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Designing a Simple Voting Machine using FPGAs with Verilog HDL and Vivado

YouTubeVipin Kizheppatt

Designing a Simple Voting Machine using FPGAs with Verilog HDL and Vivado

#VotingMachine #Verilog #Vivado #Xilinx #FPGA In this video we go through the complete design flow of a simple voting machine supporting 4 candidates. The design completely hardware based coded in Verilog. The design is not specific to Zynq SoC and can be ported into any FPGA evaluation board as long as they have buttons (or GPIOs to interface ...

32.9K viewsJan 27, 2020

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